论文标题
动态写入电压设计和MLC NAND闪存的读取优化
Dynamic Write-Voltage Design and Read-Voltage Optimization for MLC NAND Flash Memory
论文作者
论文摘要
通过使用低密度平价检查（LDPC）代码，为了减轻噪声和干扰对多级电池（MLC）闪存的影响，我们提出了一种动态的写入电压设计方案，考虑到原始位错误速率（RBER）的非对称特性（RBER），这可以通过最小化成本函数来获得最佳的写入量。为了进一步提高闪存的解码性能，我们提出了一个基于低复杂性熵的读取优化方案，该方案通过搜索log-likelihienhiahood（LLR）感知成本函数来搜索最佳熵值，从而衍生读取电压。仿真结果证明了我们提出的动态写入设计方案和相对于现有对应物的读力优化方案的优越性。
To mitigate the impact of noise and interference on multi-level-cell (MLC) flash memory with the use of low-density parity-check (LDPC) codes, we propose a dynamic write-voltage design scheme considering the asymmetric property of raw bit error rate (RBER), which can obtain the optimal write voltage by minimizing a cost function. In order to further improve the decoding performance of flash memory, we put forward a low-complexity entropy-based read-voltage optimization scheme, which derives the read voltages by searching for the optimal entropy value via a log-likelihood ratio (LLR)-aware cost function. Simulation results demonstrate the superiority of our proposed dynamic write-voltage design scheme and read-voltage optimization scheme with respect to the existing counterparts.
