论文标题
密封剂:用于高性能和低空存储器加密的SRAM AES
Sealer: In-SRAM AES for High-Performance and Low-Overhead Memory Encryption
论文作者
论文摘要
为了提供数据和代码机密性并减少内存或内存总线泄漏信息的风险,通过加密和解密引擎增强了计算系统。尽管为数据和代码保护设计硬件增强功能做出了巨大努力,但现有的解决方案在关键路径上遇到了大量性能开销。在本文中,我们通过利用SRAM子阵列的大量并行性和位线计算能力来提出密封剂,高性能和低超过SRAM内存加密引擎。密封剂在将其发送到片状上之前对数据进行加密,并在收到内存块后解密数据,从而提供数据机密性。我们提出的解决方案仅需要对现有SRAM外围电路的最小修改。与先前的解决方案相比,密封剂最多可以达到两个数量级的吞吐量改善,而消耗的能量减少了3倍。
To provide data and code confidentiality and reduce the risk of information leak from memory or memory bus, computing systems are enhanced with encryption and decryption engine. Despite massive efforts in designing hardware enhancements for data and code protection, existing solutions incur significant performance overhead as the encryption/decryption is on the critical path. In this paper, we present Sealer, a high-performance and low-overhead in-SRAM memory encryption engine by exploiting the massive parallelism and bitline computational capability of SRAM subarrays. Sealer encrypts data before sending it off-chip and decrypts it upon receiving the memory blocks, thus, providing data confidentiality. Our proposed solution requires only minimal modifications to the existing SRAM peripheral circuitry. Sealer can achieve up to two orders of magnitude throughput-per-area improvement while consuming 3x less energy compared to the prior solutions.