论文标题
Van der Waals隧道二极管中的不可分割性与保留性,用于电压控制的振荡器和内存应用
Astability versus Bistability in van der Waals Tunnel Diode for Voltage Controlled Oscillator and Memory Applications
论文作者
论文摘要
范德华(Van der Waals)(VDW)隧道连接处由于其原子尖锐的界面,登机口和稳健性而与连续层之间的格子不匹配而具有吸引力。但是,在这类隧道二极管中证明的负差分电阻(NDR)通常表现出具有低峰值电流密度的嘈杂行为,并且缺乏稳健性和可重复性,从而限制了其实际电路应用。在这里,我们提出了一种策略,即使用1L-WS $ _2 $作为最佳隧道屏障,这些隧道屏障夹在一个损坏的高度掺杂的黑色磷(BP)和SNSE $ _2 $的缝隙隧道连接处。我们实现了具有高度可重复的,超清洁和可调的NDR特性的高收率隧道二极管,具有内在振荡的特征,在300 k(4.6)在7 K时(4.6)在300 k(4.6)中具有较大的峰值与valley电流比(PVCR),使其适用于实际应用。我们表明,VDW隧道二极管电路的热力学稳定性可以通过选择电压或电流偏置来改变约束,从差异到双疗法。在电压偏置下的明智模式下,我们展示了一个紧凑的电压控制振荡器,而无需外部油箱电路。在当前偏差下的双态模式下,我们演示了一个高度可扩展的单元单位存储单元,该单元在内存密集型计算体系结构中具有密集的随机访问记忆应用程序有望。
Van der Waals (vdW) tunnel junctions are attractive due to their atomically sharp interface, gate tunablity, and robustness against lattice mismatch between the successive layers. However, the negative differential resistance (NDR) demonstrated in this class of tunnel diodes often exhibits noisy behaviour with low peak current density, and lacks robustness and repeatability, limiting their practical circuit applications. Here we propose a strategy of using a 1L-WS$_2$ as an optimum tunnel barrier sandwiched in a broken gap tunnel junction of highly doped black phosphorus (BP) and SnSe$_2$. We achieve high yield tunnel diodes exhibiting highly repeatable, ultra-clean, and gate tunable NDR characteristics with a signature of intrinsic oscillation, and a large peak-to-valley current ratio (PVCR) of 3.6 at 300 K (4.6 at 7 K), making them suitable for practical applications. We show that the thermodynamic stability of the vdW tunnel diode circuit can be tuned from astability to bistability by altering the constraint through choosing a voltage or a current bias, respectively. In the astable mode under voltage bias, we demonstrate a compact, voltage controlled oscillator without the need for an external tank circuit. In the bistable mode under current bias, we demonstrate a highly scalable, single element one-bit memory cell that is promising for dense random access memory applications in memory intensive computation architectures.