论文标题

ALIGN:一种自动模拟布局的系统

ALIGN: A System for Automating Analog Layout

论文作者

Dhar, Tonmoy, Kunal, Kishor, Li, Yaguang, Madhusudan, Meghna, Poojary, Jitesh, Sharma, Arvind K., Xu, Wenbin, Burns, Steven M., Harjani, Ramesh, Hu, Jiang, Kirkpatrick, Desmond A., Mukherjee, Parijat, Sapatnekar, Sachin S., Yaldiz, Soner

论文摘要

Align(“模拟布局,网络名单智能生成”)是用于模拟电路的开源自动布局生成流。 Align将输入Spice Netlist转换为一组设计规则所指定的特定于给定技术的输出GDSII布局。该流程首先自动检测到电路网列中的层次结构,并将布局合成转换为层次块组件的问题。在最低级别,使用设计规则的抽象生成参数化的单元格;然后将这些块在几何和电限制下组装,以构建电路布局。 Align已应用于为各种模拟电路系列的布局生成布局:低频模拟块,有线电路,无线电路和电动电路。

ALIGN ("Analog Layout, Intelligently Generated from Netlists") is an open-source automatic layout generation flow for analog circuits. ALIGN translates an input SPICE netlist to an output GDSII layout, specific to a given technology, as specified by a set of design rules. The flow first automatically detects hierarchies in the circuit netlist and translates layout synthesis to a problem of hierarchical block assembly. At the lowest level, parameterized cells are generated using an abstraction of the design rules; these blocks are then assembled under geometric and electrical constraints to build the circuit layout. ALIGN has been applied to generate layouts for a diverse set of analog circuit families: low frequency analog blocks, wireline circuits, wireless circuits, and power delivery circuits.

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